1. Field of the Invention
The present invention relates to a liquid crystal display (LCD) device, and more particularly, to a method of manufacturing an array substrate for a LCD device.
2. Description of Related Art
Active matrix LCD devices, where thin film transistors (TFTs) and pixel electrodes are arranged in the form of a matrix, have been widely used due to a high resolution and an excellent performance of implementing moving images.
FIG. 1 is a cross-sectional view illustrating a liquid crystal panel of a typical active matrix LCD device. As shown in FIG. 1, the liquid crystal panel 20 includes lower and upper substrates 2 and 4 with a liquid crystal layer 10 interposed. The lower substrate 2 on a transparent substrate 1 has two regions: a region S; and a region P. TFTs are arranged on the region S as a switching element, and pixel electrodes 14 are arranged on the pixel region P. The upper substrate 4 includes a color filter 8 and a common electrode 12 on a transparent substrate 1. Through the pixel electrode 14 and the common electrode 12, voltages are applied to the liquid crystal layer 10. In order to prevent a leakage of the liquid crystal, edge portions of the two substrate 2 and 4 are sealed by a sealant 6.
FIG. 2 is a plan view illustrating the lower array substrate 2 of FIG. 1. As shown in FIG. 2, gate lines 22 are arranged in a transverse direction, and data lines 24 are arranged in a longitudinal direction perpendicular to the gate lines 22. A pixel region is defined by the gate and data lines 22 and 24, and pixel electrodes 14 is formed on the pixel region. Thin film transistors (TFTs) xe2x80x9cTxe2x80x9d are formed at a crossing point of the gate and data lines 22 and 24. Each of the TFTs xe2x80x9cTxe2x80x9d includes a gate electrode 26, a source electrode 28 and a drain electrode 30. The gate electrode 26 extends from the gate line 22, and the source electrode 28 extends from the data line 24. The drain electrode 30 is spaced apart from the source electrode 28 and contacts with the pixel electrode 14 through a contact hole 30a. Over a portion of the gate line 22, a storage capacitor Cst is formed. In other words, in order to form the storage capacitor Cst, a portion of the pixel electrode 14 overlaps a portion of the gate electrode 22 while interposing an insulating layer therebetween.
The active matrix LCD device is operated as follows. When a voltage is applied to the gate electrode 26 of the TFT xe2x80x9cSxe2x80x9d, a data signal is applied to the pixel electrode 14. On the contrary, when no voltage is applied to the gate electrode 26, data signal is not applied to the pixel electrode 14.
The liquid crystal panel 20 is manufactured through several complex processes. Especially, the lower substrate is manufactured through several mask processes. In general, the more complex the manufacturing process is, the higher a possibility of an inferiority rate becomes. Therefore, it is important to simplify a manufacturing process.
Whether a manufacturing process of the lower substrate is complex or not depends on a kind of a material used to form components and a device performance. For example, in case of a large LCD device of more than 12 inches, a specific resistance value of a material used for a gate line is a very important parameter to determine a display quality. Therefore, in case of a large-sized LCD device, a low resistive material such as aluminum and aluminum alloy is preferably used as a material of a gate electrode. However, an aluminum-based metal is low in resistance but has a low corrosion resistance. Since aluminum has a low corrosion resistance, it may be opened in a subsequent process due to an etchant. In order to prevent a possible line open, a metal having a high corrosion resistance such as Cr and Mo is used as the second metal layer. That is, when a low resistive aluminum-based metal is used as a first metal layer to reduce a RC delay, the other metal such Cr and Mo is used a second metal layer.
FIGS. 3A to 3C are cross-sectional views taken along line IIIxe2x80x94III of FIG. 2, and illustrate a manufacturing process of the gate line. First, as shown in FIG. 3A, an AlNd layer 40 and a molybdenum (Mo) layer 42 are formed sequentially on a substrate 1. Then, a photoresist 44 is applied on the molybdenum layer 44.
Subsequently, as shown in FIG. 3B, the AlNd layer 40 and the molybdenum (Mo) layer 42 are simultaneously etched through a mask process to form the gate line 22 of a dual-layered structure. At this time, the AlNd layer 40 and the molybdenum (Mo) layer 42 have different etching rate from each other due to Galvanic Corrosion. For the more detail, since the AlNd layer 40 has a high etching rate in an etching solution, it is difficult to control the etching rate. Further, since the AlNd layer 40 is higher in etching rate than the molybdenum layer 42, its vertical side portion is more etched than that of the molybdenum layer 42. Therefore, the gate line 22 has a taper shape and an overhang xe2x80x9cOxe2x80x9d that a side portion of the molybdenum layer 42 is protruded outwardly.
The gate pattern having such an overhang cannot have a good step coverage for an insulating layer formed thereon. Therefore, the gate pattern may cause defects such as a line open and a dielectric breakdown. Further, overhang can occur in the gate line of a single-layered structure, and defects such as a line open may occur. Such defects lower a manufacturing yield as well as electrical characteristics of the gate line. Such problems lower a manufacturing yield and electrical characteristics of the gate line. In order to remove the overhang portion xe2x80x9cOxe2x80x9d, as shown in FIG. 3C, only the second metal layer 42 is dry-etched using the patterned photoresist 45 as a mask. At this time, the photoresist 45 and the overhang portion xe2x80x9cOxe2x80x9d of the molybdenum 42 are simultaneously removed. In other words, the gate electrode and the gate line having no overhang are formed in such a way that an etching gas containing an oxygen (O2) and a fluorine-based gas used an dry-etching gas ashes a portion of the photoresist 45 and then a portion of the molybdenum layer 42 is oxidized and removed.
However, since the method of manufacturing an array substrate described above additionally employs the dry-etching in order to remove the overhang portion of the electrode line, the manufacturing process becomes complicated and the number of the manufacturing processes becomes increased. Further, since the dry-etching process uses the large-sized equipment compared with the wet-etching process, a production cost becomes increased.
To overcome the problems described above, preferred embodiments of the present invention provide a method of manufacturing an array substrate by a simple manufacturing process at a low production cost.
Another object of the present invention is to provide a method of manufacturing an array substrate for a liquid crystal display device having a high aperture ratio.
In order to achieve the above object, the preferred embodiments of the present invention provide a method of manufacturing an array substrate, comprising: forming an electrode line on a substrate using a wet etching technique; and forming an organic insulating layer on an exposed surface of the substrate while covering the electrode line, wherein the electrode line has a side portion having an overhang or a taper angle of more than 45xc2x0 C.
The organic insulating layer is made of one of benzocyclobutene, an olefin-based insulating material, an acrylic-based insulating material, and a silicon-based insulating material.
The electrode line may have first and second metal layers of a dual-layered structure, and a side portion of the first metal layer is more etched than that of the second metal layer. The first metal layer is made of one of aluminum, an aluminum alloy, AlNd, copper and a copper alloy, and the second metal layer is made of one of Cr, Cr-alloy, Mo, Mo-alloy, Ta, Ta-alloy, W, and W-alloy.
The electrode line may have first, second and third metal layers of a three-layered structure, and a side portion of the second metal layer is less etched to protrude beyond that of the first and third metal layers.
In an another aspect of the invention, the present invention provides an array substrate for a liquid crystal display device, comprising: an electrode line formed on a substrate; and an organic insulating layer formed on an exposed surface of the substrate while covering the electrode line, wherein a side portion of the electrode line has an overhang or a taper angle more than 45xc2x0 C. The electrode line may have a dual-layered structure or a three-layered structure.